Reactive ion etching (RIE) is used to produce fin channels. However, punch-through errors can occur with conventional processing. With existing technology, both a top mandrel and bottom mandrel are formed of the same material (i.e. a homogenous mandrel). During RIE, punch-through of the bottom of the silicon nitride (SiN) hardmask (HM) occurs at an open area. Further, during removal of the bottom mandrel, punch-through of the Si substrate at an open area occurs. These punch-through errors adversely impact device processing including a runpath only being available using select marks, and defects downstream can go undetected. With other conventional processing of fin channels, a heterogeneous mandrel can be used where the top and bottom mandrels are made of different materials. However, when the top mandrel is an organic planarizing layer (OPL), OPL cannot be utilized for the lithography for the block patterning.
A need therefore exists for methodology that uses a unique block patterning scheme enabling the merging of space in SRAM devices using a heterogenous mandrel without generating punch-through errors.